您的位置: 专家智库 > >

国家自然科学基金(51237001)

作品数:10 被引量:7H指数:2
相关作者:陈星弼李欢更多>>
相关机构:电子科技大学更多>>
发文基金:国家自然科学基金电子薄膜与集成器件国家重点实验室基础研究开放创新基金更多>>
相关领域:电子电信理学更多>>

文献类型

  • 10篇中文期刊文章

领域

  • 10篇电子电信
  • 1篇理学

主题

  • 4篇LDMOS
  • 3篇REVERS...
  • 3篇CONDUC...
  • 3篇SNAPBA...
  • 2篇导通
  • 2篇导通电阻
  • 2篇电阻
  • 2篇比导通电阻
  • 1篇低压电源
  • 1篇电压
  • 1篇电源
  • 1篇多晶
  • 1篇多晶硅
  • 1篇载流子
  • 1篇正向压降
  • 1篇深槽
  • 1篇双通道
  • 1篇损耗
  • 1篇埋层
  • 1篇开关损耗

机构

  • 5篇电子科技大学

作者

  • 5篇陈星弼
  • 2篇李欢

传媒

  • 5篇Journa...
  • 5篇微电子学

年份

  • 3篇2019
  • 2篇2018
  • 2篇2016
  • 3篇2014
10 条 记 录,以下是 1-10
排序方式:
An LDMOS with large SOA and low specific on-resistance
2016年
An LDMOS with nearly rectangular-shape safe operation area (SOA) and low specific on-resistance is proposed. By utilizing a split gate, an electron accumulation layer is formed near the surface of the n-drift region to improve current conduction capability during on-state operation. As a result, the specific on-resistance can be low- ered down to 74.7 m^2.cm2 for a 600 V device from simulation. Furthermore, under high-voltage and high-current conditions, electrons and holes flow as majority carriers in the n-drift region and p-type split gate, respectively. Due to charge compensation occurring between holes and electrons, the local electric field is reduced and impact ion- ization is weakened in the proposed device. Therefore, a higher on-state breakdown voltage at large V6s is obtained and snap-back is suppressed as well.
杜文芳吕信江陈星弼
关键词:LDMOS
A superjunction structure using high-k insulator for power devices:theory and optimization
2016年
A superjunction(SJ) structure using a high-k(Hk) insulator is studied and optimized by using an analytic model.Results by using the proposed model match well with that of numerical calculations.Numerical calculation results show that,only needing an Hk insulator with a permittivity of ε_I=5ε_S,the optimum specific on-resistance of the MOSFET applying the proposed structure is about 8%-20%lower than that of the conventional SJ-MOSFET with V_B = 200-1000 V.An example with V_B = 400 V shows that,the permissible error range of doping concentration of the p-region to maintain above 80%of V_B is from —37%to +32%for the former and is only from-13%to +13%for the latter.
黄铭敏陈星弼
A novel double trench reverse conducting IGBT with robust freewheeling switch
2014年
The phenomenon that the wide P-emitter region in the conventional reverse conducting insulated gate bipolar transistor (RC-IGBT) results in the non-uniform current distribution in the integrated freewheeling diode (FWD), and then causes a parasitic thyristor to latch-up during its reverse-recovery process, which induces a hot spot in the local region of the device is revealed for the first time. Furthermore, a novel RC-IGBT based on double trench IGBT is proposed. It not only solves the snapback problem but also has uniform current distribution and high ruggedness during the reverse-recovery process.
朱利恒陈星弼
关键词:SNAPBACK
Novel reverse conducting insulated gate bipolar transistor with anti-parallel MOS controlled thyristor
2014年
Novel reverse-conducting IGBT (RC-IGBT) with anti-parallel MOS controlled thyristor (MCT) is proposed. Its major feature is the introduction of an automatically controlled MCT at the anode, by which the anodeshort effect is eliminated and the voltage snapback problem is solved. Furthermore, the snapback-free characteristics can be realized in novel RC-IGBT by a single cell with a width of 10 μm with more uniform current distribution. As numerical simulations show, compared with the conventional RC-IGBT, the forward conduction voltage is reduced by 35% while the reverse conduction voltage is reduced by 50% at J = 150 A/cm2.
朱利恒陈星弼
一种带埋层的超低比导通电阻槽型LDMOS被引量:1
2019年
提出了一种带n型浮空埋层的超低比导通电阻的变k槽型LDMOS(TLDMOS)。新结构在漂移区内引入变介电常数(VK)的深槽结构和自驱动的U型p区,不仅可提高漂移区的掺杂浓度,还可优化体内电场分布。衬底中引入的n埋层在器件阻断时进一步调制漂移区的电场分布。同时,额外p衬底/n埋层结的引入提高了LDMOS的纵向耐压。导通时,由于集成低压电源施加于U型p区,在其周围产生的电子积累层使器件在不增加栅电荷的情况下显著降低了比导通电阻(R_(on,sp))。仿真结果表明,与传统TLDMOS相比,在相同元胞尺寸下,新结构的击穿电压提高了59.3%,R_(on,sp)降低了86.3%。
李欢陈星弼
关键词:低压电源
利用P型场环调节表面电场的积累层LDMOS
2019年
提出了一种在N型外延层中带有P型场环的积累层LDMOS。当器件耐压时,N型漂移区中浮空P型场环能调节漂移区的电场分布,以提高器件的耐压。当器件正向导通时,漂移区上方介质层的多晶硅二极管会在漂移区表面形成一层电子积累层,大幅提高器件的导电能力,从而降低器件的比导通电阻。数值仿真结果表明,该LDMOS的比导通电阻从传统结构的371mΩ·cm2降低到60.9mΩ·cm2。相比于没有场环的传统结构,该LDMOS的耐压从660V提高到765V。
孙旭陈星弼
一种基于扩展栅的改进的双通道OPTVLD p-LDMOS被引量:4
2019年
提出了一种具有超低比导通电阻的新型优化横向变掺杂双通道p-LDMOS。与传统结构相比,该结构在器件表面增加了一个自驱动的扩展栅。该扩展栅不仅显著提高了导通时空穴的导电能力,还改善了阻断时器件表面的电场分布。因此,新结构的击穿电压(VB)与比导通电阻(Ron,sp)之间的折中关系得到显著改善。仿真结果显示,击穿电压为328V的新结构的Ron,sp为75mΩ·cm^2,仅为同条件下传统结构的48.8%,并且可与同工艺下制作的323Vn-LDMOS的Ron,sp(84mΩ·cm^2)相媲美。这为智能功率集成电路提供了更多更好的选择。
李欢程骏骥陈星弼
关键词:双通道比导通电阻
一种背面深槽填充P型多晶硅RC-IGBT
2018年
提出了一种新型RC-IGBT,在背面阳极处设置了填充重掺杂P型多晶硅的深槽和FOC浮空电极。器件正向导通时,利用重掺杂P型多晶硅与N型衬底的接触电势差,将槽间的N型衬底部分耗尽,增强了阳极PN结的短路电阻,在较短背面阳极尺寸的条件下实现了RC-IGBT在开启过程中不出现电压折回现象。在器件反向开启过程中,空穴电流经过FOC浮空电极流入P型多晶硅,降低了多晶硅与N型衬底之间的势垒,提高了反向二极管的开启速度,降低了开启过程中二极管的过充电压。仿真结果表明,提出的新型RC-IGBT完全消除了电压折回现象,反向电流的均匀性得到了提高。相比于传统RC-IGBT,该新型RC-IGBT的元胞背面尺寸减小了88.89%,关断损耗降低了26.37%,反并联二极管的反向恢复电荷降低了13.12%。
孙旭陈星弼
关键词:开关损耗
一种具有载流子存储层的500V高速SOI-LIGBT被引量:1
2018年
为了改善LIGBT的关断特性,已有一种采用PMOS管来控制LIGBT阳极空穴注入的方法。在此基础上,提出了一种具有载流子存储效应的高速SOI-LIGBT结构。采用二维仿真软件MEDICI,对器件P-top区的剂量、载流子存储层的长度、掺杂浓度等参数进行优化设计。结果表明,SOI-LIGBT的击穿电压为553V,正向压降为1.73V。关断时,引入的PMOS管可以阻止LIGBT阳极向漂移区注入空穴,使器件的关断时间下降到13ns,相比传统结构下降了87.6%。
邓菁陈星弼
关键词:击穿电压正向压降关断时间
Theoretical calculation of the p-emitter length for snapback-free reverse-conducting IGBT被引量:2
2014年
A physically based equation for predicting required p-emitter length of a snapback-free reverse- conducting insulated gate bipolar transistor (RC-IGBT) with field-stop structure is proposed. The n-buffer resis- tances above the p-emitter region with anode geometries of linear strip, circular and annular type are calculated, and based on this, the minimum p-emitter lengths of those three geometries are given and verified by simulation. It is found that good agreement was achieved between the numerical calculation and simulation results. Moreover, the calculation results show that the annular case needs the shortest p-emitter length for RC-IGBT to be snapback-free.
朱利恒陈星弼
共1页<1>
聚类工具0