DSOI,bulk Si and SOI MOSFETs are fabricated on the same die successfully using local oxygen implantation process.The thermal properties of the three kinds of devices are described and compared from simulation and measurement.Both simulation and measurement prove that DSOI MOSFETs have the advantage of much lower thermal resistance of substrate and suffer less severe self heating effect than their SOI counterparts. At the same time,the electrical advantages of SOI devices can stay.The thermal resistance of DSOI devices is very close to that of bulk devices and DSOI devices can keep this advantage into deep sub micron realm.
Energy recovery threshold logic (ERTL) is proposed,which combines threshold logic with adiabatic approach.ERTL achieves low energy as well as low gate complexity.A high efficiency power clock generator is also proposed,which can adjust duty cycle of MOS switch in power clock generator depending on logic complexity and operating frequency to achieve optimum energy efficiency.Closed-form results are derived,which facilitate efficiency-optimized design of the power clock generator.An ERTL PLA and a conventional PLA are designed and simulated on 0.35μm process.The energy efficiency of the proposed power clock generator can reach 77%～85% operating between 20～100MHz.Simulation results indicate that ERTL is a low energy logic.Including power loss of power clock circuits,ERTL PLA still shows 65%～77% power savings compared to conventional PLA.
