This paper presents a low noise, 1.25Gb/s and 124dBΩ front-end amplifier that is designed and fabricated in 0.25μm CMOS technology for optical communication applications. Active inductor shunt peaking technology and noise optimization are used in the design of a trans-impedance amplifier,which overcomes the problem of inadequate bandwidth caused by the large parasitical capacitor of the CMOS photodiode. Experimental results indicate that with a parasitical capacitance of 2pF,this circuit works at 1.25Gb/s. A clear eye diagram is obtained with an input optical signal of - 17dBm. With a power supply of 3.3V, the front-end amplifier consumes 122mW and provides a 660mV differential output.
A monolithic photoreceiver which consists of a double photodiode (DPD) detector and a regulated cascade (RGC) transimpedance amplifier (TIA) is designed.The small signal circuit model of DPD is given and the bandwidth design method of a monolithic photoreceiver is presented.An important factor which limits the bandwidth of DPD detector and the photoreceiver is presented and analyzed in detail.A monolithic photoreceiver with 1.71GHz bandwidth and 49dB transimpedance gain is designed and simulated by applying a low-cost 0.6μm CMOS process and the test result is given.
A behavioral model of the photodiode is presented.The model describes the relationship between photocurrent and incident optical power,and it also illustrates the impact of the reverse bias to the variation of the junction capacitance.According to this model,the photodiode and a CMOS receiver circuit are simulated and designed simultaneously under a universal circuit simulation environment.
A monolithically integrated optoelectronic receiver is presented. A silicon-based photo-diode and receiver circuits are integrated on identical substrates in order to eliminate the parasitics induced by hybrid packaging. Implemented in the present deep sub-micron MS/RF （mixed signal, radio frequency） CMOS,this monolithically OEIC takes advantage of several new features to improve the performance of the photo-diode and eventually the whole OEIC.
Design and fabrication of a parallel optical transmitter are reported. The optimized 12 channel parallel optical transmitter,with each channel＇s data rate up to 3Gbit/s,is designed, assembled, and measured. A top-emitting 850nm vertical cavity surface emitting laser（VCSEL） array is adopted as the light source,and the VCSEL chip is directly wire bonded to a 12 channel driver IC. The outputs of the VCSEL array are directly butt coupled into a 12 channel fiber array. Small form factor pluggable （SFP） packaging technology is used in the module to support hot pluggable in application. The performance results of the module are demonstrated. At an operating current of 8mA, an eye diagram at 3Gbit/s is achieved with an optical output of more than 1mW.
The vertical cavity surface emitting laser (VCSEL) arrays and VCSEL-based optical transmission modules are investigated.It includes the VCSEL's spectral characteristic,modulation characteristic,high frequency characteristic,and compatibility with microelectronic circuit.The module consists of 1×16 VCSEL array and 16-channel lasers driver with 0.35μm CMOS circuit by hybrid integration.During the test process,the module operates well at more than 2GHz in -3dB frequency bandwidth.
