Monolithic GaAs pin diode single pole double throw （SPDT） switches based on the fabrication technology of IMECAS are designed,fabricated,and tested. These SPDT switches achieve an insertion loss of 1.5dB,isolation of 32dB, and input and output return losses over 10dB from 8 to 20GHz. The switch design uses 2.5μm thick I-region GaAs pin diodes and a series-shunt-shunt switch topology in each arm. These performance characteristics are measured at a normal bias setting of 1.3V,which corresponds to 7mA of series diode bias current.
GaAs PIN diodes optimized for X-band low loss and high isolation switch application are presented. The impact of diode physical characteristics and electrical parameters on switch performance is discussed. A new structure for GaAs PIN diodes is proposed and the fabrication process is described. GaAs PIN diodes with an on-state resistance of 〈2. 2Ω and off-state capacitance -〈20fF in the range of 100MHz to 12.1GHz are obtained.
A monolithic single pole single throw （SPST） switch is developed with GaAs PIN diode technology from IMECAS. A novel small signal model of a GaAs PIN diode is developed for circuit simulation. The switch features an on-state insertion loss of less than 1.6dB and a return loss of greater than 10dB while maintaining an off-state isolation of greater than 23dB from 5.5 to 7. 5GHz. The measured 1dB power gain compression point is about 20dBm.
A novel equivalent circuit model for a GaAs PIN diode is presented based on physical analysis. The diode is divided into three parts： the p^＋ n^- junction, the i-layer, and the n^- n^＋ junction, which are modeled separately. The entire model is then formed by combining the three sub-models. In this way, the model＇s accuracy is greatly enhanced. Furthermore, the corresponding parameter extraction method is easy, requiring no rigorous experiment or measurement. To validate this newly proposed model,fifteen groups of diodes are fabricated. Measurement shows that the model exactly represents behavior of GaAs PIN diodes under both forward and reversely biased conditions.
