An ultra-low power complementary metal-oxide-semiconductor （CMOS） front-end readout ASIC was developed for a portable digital radiation detector. The ASIC having a charge sensitive amplifier and a semi-Gaussian pulse-shaper was produced using the CSMC 0.5 μm DPDM process. The ENC noise of 363 e at 0 pF with a noise slope of 23 e/pF complies with the stringent low noise requirements. The peaking time was 250 ns at a 100 mV/fC conversion gain （detector capacitance is 20 pF）. By operating this frontend readout ASIC in the weak inversion region, the ultra-low power dissipation is only 0.1 mW/channel （3.0 V） Simulations and test results suggest that this design gives lower power consumption than the front-end readout ASICs working in the strong inversion and is appropriate for the portable digital radiation detectors.
A novel SCR on-chip ESD device is proposed to protect IC chips against ESD stressing in two opposite direc- tions. The triggering voltages of four types of dual direction SCRs （DDSCR） are compared and analyzed, pMOS or nMOS are embedded into the structures to adjust their triggering voltages. Both MOSFETs embedded DDSCRs have tunable triggering voltage,low DC leakage （～pA）, and fast turn on speed snapback I-V characteristics without latch-up problem. It achieves high ESD performance of ～94V/μm. The new ESD protection devices are area efficient and can reduce the parasitic effects significantly.
