A multi-channel, fully differential programmable chip for neural recording application is presented. The integrated circuit incorporates eight neural recording amplifiers with tunable bandwidth and gain, eight 4thorder Bessel switch capacitor filters, an 8-to-1 analog time-division multiplexer, a fully differential successive approximation register analog-to-digital converter （SAR ADC）, and a serial peripheral interface for communication. The neural recording amplifier presents a programmable gain from 53 dB to 68 dB, a tunable low cut-off frequency from 0.1 Hz to 300 Hz, and 3.77μVrms input-referred noise over a 5 kHz bandwidth. The SAR ADC digitizes signals at maximum sampling rate of 20 μS/s per channel and achieves an ENOB of 7.4. The integrated circuit is designed and fabricated in 0.18-μm CMOS mix-signal process. We successfully performed a multi-channel in-vivo recording experiment from a rat cortex using the neural recording chip.
A new BPSK demodulator was presented.By using a clock multiplier with very simple circuit structure to replace the analog multiplier in the traditional BPSK demodulator,the circuit structure of the demodulator became simpler and hence its power consumption became lower.Simpler structure and lower power will make the designed demodulator more suitable for use in an internal single chip design for a wireless implantable neural recording system.The proposed BPSK demodulator was implemented by Global Foundries 0.35μm CMOS technology with a 3.3 V power supply.The designed chip area is only 0.07 mm;and the power consumption is 0.5 mW.The test results show that it can work correctly.
This paper present a highly-integrated neurostimulator with an on-chip inductive power-recovery fron- tend and high-voltage stimulus generator. In particular, the power-recovery frontend includes a high-voltage full- wave rectifier （up to 100 V AC input）, high-voltage series regulators （24/5 V outputs） and a linear regulator （1.8/ 3.3 V output） with bandgap voltage reference. With the high voltage output of the series regulator, the proposed neurostimulator could deliver a considerably large current in high electrode-tissue contact impedance. This neu- rostimulator has been fabricated in a CSMC 1 μm 5/40/700 V BCD＇process and the total silicon area including pads is 5.8 mm2. Preliminary tests are successful as the neurostimulator shows good stability under a 13.56 MHz AC supply. Compared to previously reported works, our design has advantages of a wide induced voltage range （26-100 V）, high output voltage （up to 24 V） and high-level integration, which are suitable for implantable neu- rostimulators.
