Many 3D IC applications such as MEMS and RF systems require Through-Silicon Via(TSV) with operations for high-speed vertical communication.In this paper,we introduce a novel air-gap coaxial TSV that is suiTab.for such RF applications.Firstly,the detailed fabrication process is described to explain how to acquire such a structure.Then,an Resistor Inductance Conductance Capacitance(RLGC) model is developed to profile the transverse electromagnetic field effect of the proposed air-gap TSV.The model is further verified by a 3D field solver program through the S-parameter comparison.With reference to the numerically simulated results,this analytical model delivers a maximum deviation of less than 6‰,on the conditions of varying diameters,outer to inner radius ratios,and SU-8 central angles,etc.Taking advantages of scalability of the model,a number of air-gap-based TSV designs are simulated,providing 1.6~4.0 times higher bandwidth than the conventional coaxial TSVs and leading to an efficient high frequency vertical RF interconnection solution for 3D ICs.
This paper proposes a novel technique for modeling the electrostatic discharge （ESD） characteristic of the enclosed-gate layout transistors （ELTs）. The model consists of an ELT, a parasitic bipolar transistor, and a substrate resistor. The ELF is decomposed into edge and comer transistors by solving the electrostatic field problem through the conformal mapping method, and these transistors are separately modeled by BSIM （Berkeley Short- channel IGFET Model）. Fast simulation speed and easy implementation is obtained as the model can be incorporated into standard SPICE simulation. The model parameters are extracted from the critical point of the snapback curve, and simulation results are presented and compared to experimental data for verification.
