A monolithic voltage controlled oscillator （VCO） based on negative resistance principle is presented uti-lizing commercially available InGaP/GaAs hetero-junction bipolar transistor （HBT） technology. This VCO is de-signed for 5GHz-band wireless applications. Except for bypass and decoupled capacitors,no external component is needed for real application. Its measured output frequency range is from 4.17 to 4.56GHz,which is very close to the simulation one. And the phase noise at an offset frequency of 1MHz is -112dBc/Hz. The VCO core dissipates 15.5mW from a 3.3V supply,and the output power ranges from 0 to 2dBm. To compare with other oscillators,the figure of merit is calculated,which is about -173.2dBc/Hz. Meanwhile, the principle and design method of nega-tive resistance oscillator are also discussed.
A programmable multi-modulus frequency divider is designed and implemented in a 0. 35μm CMOS process. The multi-modulus frequency divider is a single chip with two dividers in series,which are divided by 4 or 5 prescaler and by 128-255 multi-modulus frequency divider. In the circuit design, power and speed trade-offs are analyzed for the prescaler, and power optimization techniques are used according to the input frequency of each divider cell for the 128-255 multimodulus frequency divider. The chip is designed with ESD protected I/O PAD. The dividers chain can work as high as 2.4GHz with a single ended input signal and beyond 2.6GHz with differential input signals. The dual-modulus prescaler consumes 11mA of current while the 128-255 multi-modulus frequency divider consumes 17mA of current with a 3.3V power supply. The core area of the die without PAD is 0.65mm × 0.3mm. This programmable multi-modulus frequency divider can be used for 2.4GHz ISM band PLL-based frequency synthesizers. To our knowledge, this is the first reported multi-modulus frequency divider with this structure in China.
A fully integrated 3GHz low-power and low-phase-noise voltage-controlled oscillator （VCO） with a self-biasing current source was implemented in a standard 0.18μm CMOS process. A trade-off between noise and power was realized through the optimization of the improved current source. The VCO can be tuned from 2.83 to 3.25GHz with a 13.8% tuning range. The measured phase noise at 1MHz offset is -111dBc/Hz at a frequency of 3.22GHz while the core circuit draws less than 2mA from a 1.8V supply voltage. These results make the circuit suitable for a 5GHz wireless local area network （WLAN） receiver and 3.4 to 3.6GHz world interoperability for microwave access （WiMAX） application.
